Job Description:
For a hi-tech company developing chip's for communication devices, with offices in the center.
RESPONSIBILITIES
" Micro-architecture definitions at the unit level
" Specification, design, RTL coding and optimization of complex blocks
" Close work with the verification team on block/top level to ensure timely delivery of quality designs
Job Qualifications:
" Engineering degree from a leading University (Technion, Tel Aviv, Ben Gurion)
" Minimum of 7-10+ years experience of ASIC and/or FPGA development.
" Fluent in Verilog/SystemVerilog
" Knowledge of verification methodologies (SystemVerilog/UVM) an advantage
" Experience in full chip development flow
" Knowledge of synthesis and static timing analysis tools
" Experience of implementing digital signal processing modules an advantage
" Fluent written and spoken English
Company Occupation:
High Tech, Semiconductor/capital equipment
Company Size:
Medium (50 - 150)